1. Field of the Invention
The present invention pertains to phase-locked loop systems, and, in particular, to a digital phase-locked loop implementation wherein phase compensation and frequency compensation are separated (i.e., de-coupled) from one another.
2. Description of the Related Art
A phase-locked loop is a well-known feedback control system that generates an oscillating output signal having a phase that is synchronized with the phase of an oscillating input signal. The frequency of the output signal may be the same as or some fraction or multiple of the frequency of the input signal. Phase-locked loops are used in many different types of electronics applications, and can be used to perform a variety of different functions. For example, and without limitation, a phase-locked loop may be used to demodulate a signal, to recover a signal from a noisy communication channel, to generate a stable frequency at multiples of an input frequency (referred to as frequency synthesis), to generate an unmodulated signal carrying time information, or to distribute precisely timed clock pulses in digital logic circuits such as microprocessors, FPGAs and CPUs. Phase-locked loop systems may be implemented as either analog or digital circuits.
While phase-locked loop technology has been around for years, there remains room for improvement with respect thereto, especially with respect to digital phase-locked loop system.